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​단국대학교 반도체 설계 연구실

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    • RESEARCH

      • ESD Protection
      • PMIC
      • Wide Band-Gap Semiconductor
      • Power Semiconductor
    • PROJECT

      • INPROGRESS
      • COMPLETED
    • MEMBER

      • PROFESSOR
      • Lab Members
      • Alumni
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      NEWS

      [ETNEWS](2020.12.27) [기고]시스템반도체 전문 연구인력 양성 절실하다

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      [NEWS1](2020.11.27) 차세대 SiC반도체 정전기 방전 최소화 기술 세계 최초 개발

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      ​반도체 설계 연구실 대학원생 모집

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      PUBLICATIONS

      "A 4H-SiC MOSFET-based ESD Protection with Improved Snapback Characteristics for High Voltage Applications"

      IEEE Transactions on Power Electronics 

      2021

      "A Novel Low Dynamic Resistance Dual -Directional SCR with High Holding Voltage for 12 V Applications"

      IEEE Transactions on Electron Devices

      November, 2020

      "Design of 4H-SiC-Based Silicon-Controlled Rectifier With High Holding Voltage Using Segment Topology for High-Voltage ESD Protection"

      IEEE Electron Device Letters

      November, 2020

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      Dankook University Semiconductor Design Laboratory | Address : Room 402, No. 2 Engineering Building, 152, Jukjeon-ro, Suji-gu, Yongin-si, Gyeonggi-do, Republic of Korea

      Laboratory-1(Professor) :  Room 402, No. 2 Engineering Building | TEL +82-31-8005-3625

      Laboratory-2 :  Room 417, No. 2 Engineering Building  | TEL +82-31-8005-3643